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micron MT29F8G08ABACAWP-IT:C STOCK

This ONFI 1.0-compliant NAND Flash device is built on single-level cell (SLC) technology and is available in 8Gb and 16Gb densities. It features an x8 page size of 4320 bytes (4096 + 224 bytes) and an x16 page size of 2160 words (2048 + 112 words), with a block size of 64 pages (256K + 14K bytes) and a plane size of 2 planes × 2048 blocks per plane. The device delivers asynchronous I/O performance with tRC/tWC of 20 ns (3.3 V) and 30 ns (1.8 V), and array performance including a 25-µs read page, 200-µs typical program page, and 2-ms typical erase block. It supports the ONFI NAND Flash Protocol command set along with advanced commands such as program page cache mode, read page cache mode, one-time programmable (OTP) mode, block lock (1.8 V only), programmable drive strength, two-plane commands, multi-die (LUN) operations, read unique ID, and internal data move.

Features:

• Open NAND Flash Interface (ONFI) 1.0-compliant1

• Single-level cell (SLC) technology

• Organization

– Page size x8: 4320 bytes (4096 + 224 bytes)

– Page size x16: 2160 words (2048 + 112 words)

– Block size: 64 pages (256K + 14K bytes)

– Plane size: 2 planes x 2048 blocks per plane

– Device size: 8Gb: 4096 blocks

– Device size: 16Gb: 8192 blocks

• Asynchronous I/O performance

–tRC/tWC: 20ns (3.3V), 30ns (1.8V)

• Array performance

– Read page: 25µs

– Program page: 200µs (TYP)

– Erase block: 2ms (TYP)

• Command set: ONFI NAND Flash Protocol

• Advanced command set

– Program page cache mode

– Read page cache mode

– One-time programmable (OTP) mode

– Block lock (1.8V only)

– Programmable drive strength

– Two-plane commands

– Multi-die (LUN) operations

– Read unique ID

– Internal data move

• Operation status byte provides software method fordetecting

– Operation completion

– Pass/fail condition

– Write-protect status

• Ready/Busy# (R/B#) signal provides a hardwaremethod of detecting operation completion

• WP# signal: Write protect entire device

• First block (block address 00h) is valid when shipped from factory with ECC. For minimum requiredECC, see Error Management.

• RESET (FFh) required as first command afterpower-on

• Alternative method of device initialization afterpower-up (contact factory)

• Internal data move operations supported within theplane from which data is read

• Quality and reliability

– Data retention: JESD47G-compliant; see qualification report

– Endurance: 60,000 PROGRAM/ERASE cycles

• Operating voltage range– VCC: 2.7–3.6V– VCC: 1.7–1.95V

• Operating temperature

– Commercial: 0°C to +70°C

– Industrial (IT): –40ºC to +85ºC

• Package

– 48-pin TSOP type 1, CPL2

– 63-ball VFBGA


How to Order

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