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RENESAS 6V49205BNLGI Datesheet

The 6V49205B is a main clock for Freescale P10xx and P20xx-based systems. It provides a selectable System CCB clock and 2 DDRCLK speeds (100M or 66.66M), along with LP-HCSL PCIe outputs for low power and reduced board space. Output features include one Sys_CCB 3.3V LVCMOS output at 100M/83.33M/80M/66.66M; one DDRCLK 3.3V LVCMOS output at 100M or 66.66M; one 125M 3.3V LVCMOS output; six LP-HCSL PCIe pairs selectable at 100M or 125M; six 25MHz 3.3V LVCMOS outputs; two 2.048M 3.3V LVCMOS outputs; and two USB 3.3V LVCMOS outputs at 12M or 24M. Key specifications include PCIe Gen1-2-3 compliance and <3p rms phase noise on REF outputs. The device replaces 11 crystals, 2 oscillators, and 3 clock generators, lowering cost, power, and area; integrated terminations on LP-HCSL PCIe outputs eliminate 24 resistors, saving 41mm² of board area; it supports industrial temperature range operation, uses an advanced 3.3V CMOS process for high performance and low power, supports independent spread spectru

Description:

The 6V49205B is a main clock for Freescale P10xx andP20xx-based systems. It has a selectable System CCB clockand 2 DDRCLK speeds – 100M or 66.66M. The 6V49205Balso provides LP-HCSL PCIe outputs for low-power andreduced board space.

Output Features:

• 1 – Sys_CCB 3.3V LVCMOS output at 100M/83.33M/80M/66.66M

• 1 – DDRCLK 3.3V LVCMOS output at 100M or 66.66M 1

• 1 – 125M 3.3V LVCMOS output

• 6 – LP-HCSL PCIe pairs selectable at 100M or 125M

• 6 – 25MHz 3.3V LVCMOS outputs

• 2 – 2.048M 3.3V LVCMOS outputs

• 2 – USB 3.3V LVCMOS outputs at 12M or 24M

Key Specifications:

• PCIe Gen1-2-3 compliant

• < 3p rms phase noise on REF outputs


Features:

• Replaces 11 crystals, 2 oscillators and 3 clock generators;lowers cost, power and area

• Integrated terminations on LP-HCSL PCIe outputs;eliminate 24 resistors, saving 41mm2 of board area• Industrial temperature range operation; supportsdemanding environmental conditions

• Advanced 3.3V CMOS process; high-performance,low-power

• Supports independent spread spectrum onSys_CCB/DDRCLK and PCIe outputs

• Available in space-saving 7 x 7 mm 48-VFQFPN with0.5mm pad pitch; reduced board space without the need forfine-pitch assembly techniques

Typical Applications:

System Clock for Freescale P10xx and P20xx-based designs



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