Supply voltage range: 2.0V to 5.5V
Temperature range: -40℃ to 125℃
Low power mode: sleep mode, deep sleep mode
Operating power consumption: 120uA/ MHz@64MHz
Power consumption in deep sleep mode: 0.8uA
Deep sleep mode +32.768K+RTC operation: 1.2uA
ARM®32-bit Cortex-M0®+ CPU
Operating frequency: 32KHz to 64MHz
256KB Flash memory, program sharedwith data storage
2.5KB dedicated data Flash memory
32KB SRAM MEMORY WITH PARITY
Built-in power-on reset (POL) circuitry
Built-in voltage detection (LVD) circuit(threshold voltage can be set).
Built-in high-speed oscillator, accuracy(±1%). A 1 MHz to 64MHz system clockand peripheral module action clock areavailable
Built-in 15KHz low-speed oscillator
Built-in 1 channel PLL
Support 1MHz ~ 20MHz external crystaloscillator, support stop vibrationmonitoring
Supports 32.768KHz external crystaloscillator for correction of internal high- speed oscillators
Multiplier: Supports single-cycle 32bitmultiplication operations
Divider: Supports 32bit signed integerdivision and requires only 8 CPU clockcycles to complete the operation
An interrupt triggers a start.
Transfer modes selectable (normaltransfer mode, repeat transfer mode, block transfer mode, and chain transfer mode)
The source/destination field is optional forfull address space range
It can link event signals together toachieve the linkage of peripheralfunctions.
There are 23 types of event inputs and 10types of event triggers.
12-bit precision ADC converter with1.42Msps slew rate, 21 external analogchannels, internal selectable PGA output asthe conversion channel, temperature sensor, and support for single-channel conversionmode and multi-channel sweep conversionmode. Conversion range: 0 to positivereference voltage
8-bit precision D/A converter, 2-channelanalog output, real-time output function, output voltage range 0~VDD
Comparator (CMP) with built-in two-channelhysteresis comparator, selectable inputsource, and selectable external reference orinternal reference voltage reference
Programmable gain amplifier (PGA) with two channels of PGA to program 4/8/10/12/14/16/32 gains with an external GND pin that can be used as differentialmode
I/O ports: 45 to 75
Capable of N-channel open-drain, TTL inputbuffering, and internal pull-up switching
Built-in key interrupt check-out function
Control circuitry with built-in clockoutput/buzzer output
16-bit timer: 17 channels (with PWM functionand motor dedicated PWM function).
15-bit interval timer: 1
Real-time clock (RTC): 1 (with perpetualcalendar, alarm clock function, and supportfor a wide range of clock correction).
Watchdog timer (WWDT): 1
SysTick timer
3 serial communication unit: Serial communication unit 0 can be freelyconfigured as 2-channel standard UART or 4- channel 3-wire SPI or 4-channel simple I2C;Serial communication unit 1 or 2 can befreely configured as 1-channel standardUART or 2-channel 3-wire SPI or 2-channelsimple I2C; (UART of unit 0 supports LIN Buscommunication, SPI00 channel supports 4-wire SPI communication)
Standard I2C: 2 channels
CAN: 2 channels
Complies with IEC/UL 60730 relatedstandards
Abnormal storage space access error isreported
Supports RAM parity
Supports hardware CRC verification
Supports critical SFR protection againstmisoperation
128-bit unique ID number
Flash secondary protection in debug mode(level1: only flash full domain erasure, cannot read and write; level2: The emulatorconnection is invalid and cannot be operatedon flash).
Support 48Pin, 64Pin, 80Pin multiplepackages
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