Operating Voltage:1.8V~5.5V
Operating ambient temperature: -40℃~105℃
Low power modes: SLEEP, DEEPSLEEP
Operating power consumption:
RUN mode: 35uA/MHz@64MHz
DEEPSLEEP mode:0.45uA
DEEPSLEEP mode (+32.768K+RTC):0.7uA
ARM®32-bitCortex®-M0+ CPU
Operating frequency:32KHz~64MHz
64KB Flash Memory: program/data flash
1.5KB Special data flash memory
8KB SRAM Memory (With Parity)
Power-on reset circuit.
On-chip voltage detector (LVD) (Selectinterrupt and reset level by option byte)
Main clock oscillator: 1MHz to 64MHz
Sub clock oscillator: 32.768KHz
High-speed on-chip oscillator: 1MHz to 20MHz, accuracy (±1%)
Low-speed on-chip oscillator: 15KHz
Integer multiplier
Interupt trigger start.
Transfer modes: Normal mode, Repeatmode, Block mode and Chain transfersmode
Transfer space: 4 GB area from 0000 0000hto FFFF FFFFh except reserved areas
Event Link Controller
Event signals (15 types) can be used asactivation sources for operating any one of 4types of peripheral functions
12-Bit A/D Converter
Conversion range: 0 to Vrefp or VDDAnalog input: Up to 15 channels, Internalreference voltage (1.45 V) and temperaturesensor
Conversion range: 0 to Vrefp or VDDAnalog input: Up to 15 channels, Internalreference voltage (1.45 V) and temperaturesensor
Conversionrate: 1.42Msps
Comparator (CMP) × 2: The external referencevoltage or internal reference voltage can beselected as the reference voltage
Programmable gain amplifier (PGA)×2:GAIN x4/8/10/12/14/16/32 can be selected
I/O port: 29 to 45
Can be set to N-ch open drain and on-chippull-up resistor
Digital function can be freely assigned toany pin
On-chip clock output/buzzer output controller
16-bit timer: 8 channels
15-bit interval timer: 1 channel
Real-time clock (RTC): 1 channel
Watchdog timer (WWDT): 1 channel (operablewith the dedicated low-speed on-chip oscillator)
SysTick timer
SCI: 3 channels (1 UART / 2 SPI / 2 I2C foreach SCI channel)
Standard SPI:1 channel (8bit or 16bit)
Standard I2C:1 channel
IrDA:1 channel
IEC/UL 60730
Illegal memory access
SRAM Parity Error Check
Cyclic Redundancy Check (CRC) Calculator
SFR protection
128-bit unique ID
Flash secondary protection in debug mode(level1: only erase the entire area of flash;level2: the emulator connection is invalid)
48LQFP, 40QFN, 32LQFP, 32QFN
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